Trench isolations constitute lateral isolation structures of adjacent electrically active regions which are formed as trenches that are etched in a semiconductor substrate and filled with an electrically insulating material. Such isolation structures are necessary since, on account of the high packing density of contemporary integrated circuits (IC), the distances between the active components on the semiconductor wafer are so small that the components reciprocally influence one another to a great extent. In this case, it is also possible for parasitic components to arise which disturb the function of the original components. Trench isolations are possibilities for isolating the adjacent electrically active regions.
Silicon dioxide (SiO2) is generally used as material for filling the trenches in the case of trench isolations, and is deposited with the aid of thermal oxidation and oxide deposition into the trench structure. However, in the case of large aspect ratios of the trenches, which arise on account of the decreasing mutual distances between the components on a semiconductor substrate, it proves to be increasingly difficult to fill the isolation trenches. In particular, inner voids (shrink holes) occur in this case, and can disturb the function of the trench isolation or the further layer construction above the trench isolation.
Furthermore, damage caused by degrading process steps during the post STI processing can impair the effect of trench isolations. Thus, principally the removal and the roughening of the insulator filling are responsible for defects of the trench isolation or adjoining components.
Such defects can largely be avoided by elevated trench isolations and/or by restrictions to the post STI processing.
In order to protect the insulator layer of the trench isolation against damage which can arise during the post STI processing, U.S. Pat. No. 6,146,970 A proposes depositing a nitride layer on the insulator layer. For this purpose, in a first step, a polysilicon layer formed on an adhesion layer above the substrate surface is oxidized. Removal of the thin oxide layer thus produced yields, along the isolation trench, a narrow region of open substrate surface, which is likewise filled during the subsequent filling of the isolation trench. In this case, the width of the overlap region of the nitride covering layer is prescribed by the thickness of the removed oxide layer.
U.S. Pat. Nos. 6,010,947 A, 5,940,716 A and 6,143,623 A in each case describe methods for fabricating trench isolations which have regions partly overlapping the semiconductor substrate along their periphery.
U.S. Pat. No. 6,143,626 A discloses a method for fabricating a trench isolation in a semiconductor substrate, wherein a two-layer isolation trench filling is provided in order to avoid voids which can usually arise during the filling of isolation trenches.